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Chapter 10: Adding a Board Library
10–5
Creating a New Board Description
<pin location="Pin_C21"/>
<pin location="Pin_C23"/>
<pin location="Pin_AE18"/>
<pin location="Pin_AE19"/> <!-- MSB-->
</component>
where attribute name defines the name of the component on the board and label
defines the name of the component as it appears in Simulink. For a component
with width n , there must be n pin subelements. The pin location must be a valid
FPGA pin name. The pin ordering is listed from LSB to MSB, with LSB on top of
the list.
■
Selectable single bit type example:
<component name="PROTO1">
<pin location="Pin_C3"/>
<pin location="Pin_D2"/>
<pin location="Pin_L3"/>
<pin location="Pin_J7"/>
<pin location="Pin_J6"/>
<pin location="Pin_K6"/>
</component>
This element has the same format as the fixed-size bus type, but you can choose
each pin element from a specified list of available FPGA pin locations.
The configuration element defines the board configuration block. For example:
<configuration icon="dspboard2c35.bmp" width="166" height="144">
<devices jtag-code="0x020B40DD">
<device name="EP2C35F672C6" />
</devices>
<!-- Input clock selection list -->
<option name="ClockPinIn" label="Clock Pin In">
<pin location="Pin_N2"/>
<pin location="Pin_N25"/>
<pin location="Pin_AE14"/>
<pin location="Pin_AF14"/>
<pin location="None"/>
</option>
<!-- Global Reset Pin -->
<option name="GlobalResetPin" label="Global Reset Pin">
<pin location="Pin_A14"/>
<pin location="Pin_AC18"/>
<pin location="Pin_AE16"/>
<pin location="Pin_AE22"/>
<pin location="None"/>
November 2013
Altera Corporation
DSP Builder Handbook
Volume 2: DSP Builder Standard Blockset
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